Senior DRAM Design Engineer: Memory Innovation Lead

Micron Memory Malaysia Sdn Bhd; Boise (ID); On-site; USD 120,000 - 170,000; Full time

Job summary

Micron Technology in Boise, Idaho, is seeking a Senior DRAM Design Engineer to design and analyze digital and analog circuits for memory products, collaborating with global design and verification teams. You will support Product Engineering, Test, Probe, Process Integration, and Marketing to optimize manufacturability, cost, and reliability.

The role requires a BSEE or MSEE with 4+ years in semiconductor design, strong SPICE/Verilog modeling skills, and experience with Synopsys and Cadence

Qualifications

• BSEE or MSEE in Electrical Engineering.
• 4+ years of semiconductor design experience.
• Proficient in SPICE and Verilog modeling.
• Experience with Synopsys and Cadence Virtuoso.

Responsibilities

• Contributing to the development of Memory/Logic/Analog circuits with design, layout, verification, and optimization.
• Parasitic modeling and assisting in design validation, reticle experiments and tape-out revisions.
• Lead the layout process including floor-planning, placement, and routing.
• Collaborate with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering for manufacturability.

Skills

Circuit design

SPICE modeling

Verilog

Synopsys

Cadence Virtuoso

Education

BSEE or MSEE in Electrical Engineering

Tools

Synopsys

Cadence Virtuoso

Job description

Micron Technology in Boise, Idaho, is seeking a Senior DRAM Design Engineer to design and analyze digital and analog circuits for memory products, collaborating with global design and verification teams. You will support Product Engineering, Test, Probe, Process Integration, and Marketing to optimize manufacturability, cost, and reliability.

The role requires a BSEE or MSEE with 4+ years in semiconductor design, strong SPICE/Verilog modeling skills, and experience with Synopsys and Cadence