Senior DFT Engineer: ASIC Test & Yield, Equity Eligible

8413 LSI Corporation; San Jose (CA); On-site; USD 140,000 - 210,000; Full time

Benefits offered by this job

Medical, dental & vision plans

401(k) participation including company

Employee stock purchase program

Job summary

Broadcom, Inc. is seeking a DFT Engineer in San Jose, CA to drive DFT strategy from spec to production. The role involves DFT test insertion, pattern generation, coverage improvements and post-silicon yield optimization across cross-functional teams.

You will work with STA, DI, and external customers, and code in TCL, PERL, RUBY, PYTHON, C++ or similar to automate tests and debug complex vector sets. 5+ years in related roles preferred at the bachelor level.

Qualifications

• Strong DFT background including IO, analog DFT, ATPG and related areas.
• Scan insertion & scan compression experience with industry tools.
• ATPG vector generation, simulation and debugging experience.

Responsibilities

• Understand Broadcom & customer DFT feature requirements.
• Implement DFT including Scan, MBIST, TAP, LBIST, IO, SerDes integration.
• Generate, verify and debug test vectors before tape release.
• Validate and debug test vectors on ATE during silicon bring-up.

Skills

DFT

ATPG

Scan

BIST

Verilog

TCL

Python

C++

Education

Bachelor's degree in Electrical/Electronic/Computer Engineering

Master's degree in Electrical/Electronic/Computer Engineering

Tools

TetraMax

Fastscan

Mentor TestKompress

Job description

Broadcom, Inc. is seeking a DFT Engineer in San Jose, CA to drive DFT strategy from spec to production. The role involves DFT test insertion, pattern generation, coverage improvements and post-silicon yield optimization across cross-functional teams.

You will work with STA, DI, and external customers, and code in TCL, PERL, RUBY, PYTHON, C++ or similar to automate tests and debug complex vector sets. 5+ years in related roles preferred at the bachelor level.