Senior DFT Engineer: AI-Enhanced ASIC/SoC for LEO RF

Amazon Kuiper Manufacturing Enterprises LLC

Oceanside (CA)

On-site

USD 185,000 - 250,000

Full time

5 days ago
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Benefits offered by this job

Health insurance
RSUs
401(k) matching
Paid time off
Parental leave

Job summary

Amazon LEO’s team is seeking a senior DFT engineer to architect and implement DFT solutions for next‑gen satellite modem chips. You will define DFT architectures, develop automated scripts, and collaborate across ASIC and RFIC groups to reach target fault coverage and performance.

The role involves integrating DFT logic such as MBIST, clock controls, and JTAG controllers, while coordinating with implementation and test teams to translate ATE patterns and bring up digital blocks.

Qualifications

  • Bachelor's degree in Electrical/Communications Engineering, or experience working in electrical engineering field.
  • 5+ years of experience in advanced DFT techniques for deep sub-micron nodes.
  • Experience implementing DFT methodology and developing automated scripts for DFT Insertion and Validation.

Responsibilities

  • Architect and define DFT solutions adapted to the specific use of various LEO’s chips.
  • Contribute to the improvement and customization of IPs and DFT methodology while embracing AI flow.
  • Work with the ASIC design teams in all the sites to incorporate DFT logic like MBIST, clock controls and JTAG controllers.
  • Work with RFIC teams to ensure maximum fault coverage on the custom RF blocks.
  • Ensure that blocks meet DFT, timing and power targets by working closely with the implementation team.
  • Work closely with the Test engineering team to help translate the ATE patterns to tester format.
  • Work with the test team to do jointly bring up the digital portions of the LEO chips.

Skills

DFT architecture
Automation scripting
DFT validation
AI/ML in DFT
Cross-team collab

Education

Bachelor's degree in Electrical/Communications Engineering
Master's or Ph.D. in Electrical/Communications Engineering

Tools

MBIST
JTAG controllers

Job description

Amazon LEO’s team is seeking a senior DFT engineer to architect and implement DFT solutions for next‑gen satellite modem chips. You will define DFT architectures, develop automated scripts, and collaborate across ASIC and RFIC groups to reach target fault coverage and performance.

The role involves integrating DFT logic such as MBIST, clock controls, and JTAG controllers, while coordinating with implementation and test teams to translate ATE patterns and bring up digital blocks.

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