Senior DFT Engineer AI-Driven ASICs for LEO Satcom

Amazon Kuiper Manufacturing Enterprises LLC; Alpine (CA); On-site; USD 185,000 - 250,000; Full time

Job summary

Amazon LEO is seeking a Senior DFT Engineer to define and implement DFT solutions for high-volume LEO chips. You will work across ASIC design and RFIC teams to maximize fault coverage and meet timing, power, and DFT targets.

This role requires hands-on experience with MBIST, clock controls, JTAG, and automation using AI/ML-based flows to streamline DFT insertion and validation. The position is on-site in California with strong growth opportunities.

Qualifications

• Bachelor's degree in Electrical/Communications Engineering or equivalent experience.
• 5+ years of experience in advanced DFT techniques for deep sub-micron nodes.
• Experience implementing DFT methodology and automated DFT insertion/validation scripts.
• Familiarity with RFIC interactions on mixed-signal chips is a plus.
• Awareness of automotive standards and DPPM targets is helpful.

Responsibilities

• Architect and define DFT solutions for various LEO chips.
• Improve IPs and DFT methodologies, embracing AI flows.
• Collaborate with ASIC design teams to integrate DFT like MBIST, clock controls, JTAG.
• Coordinate with RFIC teams to maximize fault coverage on RF blocks.
• Ensure blocks meet DFT, timing, and power targets with implementation teams.
• Translate ATE patterns for testers with Test engineering.
• Assist in bringing up the digital portions of the LEO chips with test teams.

Skills

DFT techniques

Automation scripts

AI/ML automation

RFIC coordination

DFT/Inclusion methodology

MBIST

Timing & power targets

Education

Bachelor's degree in Electrical/Communications Engineering

Master's or Ph.D in Electrical / Communications Engineering

Job description

Amazon LEO is seeking a Senior DFT Engineer to define and implement DFT solutions for high-volume LEO chips. You will work across ASIC design and RFIC teams to maximize fault coverage and meet timing, power, and DFT targets.

This role requires hands-on experience with MBIST, clock controls, JTAG, and automation using AI/ML-based flows to streamline DFT insertion and validation. The position is on-site in California with strong growth opportunities.