Senior DFT Engineer – AI-Driven ASICs for LEO Satcom

Amazon Kuiper Manufacturing Enterprises LLC

Del Mar (CA)

On-site

USD 185,000 - 250,000

Full time

5 days ago
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Benefits offered by this job

Health insurance
401(k) matching
Paid time off
Parental leave

Job summary

Amazon is seeking an experienced DFT engineer to join the LEO chip team in California. You will architect DFT solutions for deep sub-micron SOCs, develop automated scripts for insertion and validation, and collaborate with ASIC and RFIC teams to achieve high fault coverage and robust validation.

The role requires a Bachelor's degree in Electrical/Communications Engineering and 5+ years in DFT, with preferred advanced degrees and exposure to Logic BIST and automotive standards.

Qualifications

  • Bachelors in Electrical/Communications Engineering or equivalent experience.
  • 5+ years of experience in advanced DFT techniques for deep sub-micron nodes.
  • Experience implementing DFT methodology and developing automated scripts for insertion and validation.

Responsibilities

  • Architect and define DFT solutions for various LEO chips.
  • Contribute to IP and DFT methodology improvements and AI-based workflow automation.
  • Collaborate with ASIC design teams to integrate DFT logic (MBIST, clock controls, JTAG).
  • Coordinate with RFIC teams for maximum fault coverage on mixed-signal blocks.
  • Ensure blocks meet DFT, timing, and power targets with the implementation team.
  • Translate ATE patterns to tester formats with Test engineering.
  • Assist in bringing up digital portions of LEO chips with Test teams.

Skills

DFT techniques
Automation scripting
ASIC integration
RFIC collaboration

Education

Bachelor's degree in Electrical/Communications Engineering

Job description

Amazon is seeking an experienced DFT engineer to join the LEO chip team in California. You will architect DFT solutions for deep sub-micron SOCs, develop automated scripts for insertion and validation, and collaborate with ASIC and RFIC teams to achieve high fault coverage and robust validation.

The role requires a Bachelor's degree in Electrical/Communications Engineering and 5+ years in DFT, with preferred advanced degrees and exposure to Logic BIST and automotive standards.

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