Senior DFT Engineer - AI-Driven ASIC for LEO Chips

Amazon Kuiper Manufacturing Enterprises LLC; Poway (CA); On-site; USD 185,000 - 250,000; Full time

Job summary

Amazon Kuiper Manufacturing Enterprises LLC is seeking an experienced DFT Engineer to define and implement DFT solutions for the LEO chip SOCs used in satellite communications. You will work with ASIC design teams across sites to integrate DFT logic such as MBIST, clock controls, and JTAG, and collaborate with RFIC teams to maximize fault coverage on mixed-signal blocks.

The role emphasizes AI-driven automation in the DFT workflow, ensuring timing, power, and DFT targets are met in a fast-paced

Qualifications

• Bachelor's degree in Electrical/Communications Engineering, or related electrical engineering experience.
• 5+ years of experience in advanced DFT techniques for deep sub-micron nodes.
• Experience implementing DFT methodology and developing automated scripts for DFT Insertion and Validation.

Responsibilities

• Architect and define DFT solutions for various LEO chips.
• Contribute to IPs and DFT methodology while embracing AI flow.
• Collaborate with ASIC design teams across sites to implement DFT logic (MBIST, clock controls, JTAG).
• Work with RFIC teams to ensure maximum fault coverage on mixed-signal blocks.
• Ensure blocks meet DFT, timing, and power targets with implementation teams.
• Translate ATE patterns to tester format with Test engineering.
• Assist test team in bringing up digital portions of LEO chips.

Skills

DFT techniques

Automation scripting

AI/ML in DFT

DFT insertion

RFIC collaboration

Education

Bachelor's in Electrical/Communications Eng

Master’s or PhD in Electrical/Communications Eng

Job description

Amazon Kuiper Manufacturing Enterprises LLC is seeking an experienced DFT Engineer to define and implement DFT solutions for the LEO chip SOCs used in satellite communications. You will work with ASIC design teams across sites to integrate DFT logic such as MBIST, clock controls, and JTAG, and collaborate with RFIC teams to maximize fault coverage on mixed-signal blocks.

The role emphasizes AI-driven automation in the DFT workflow, ensuring timing, power, and DFT targets are met in a fast-paced