Senior DFT Engineer - AI-Driven ASICs for LEO

Amazon Kuiper Manufacturing Enterprises LLC; Rancho Santa Fe (CA); On-site; USD 185,000 - 250,000; Full time

Job summary

Amazon is seeking a DFT-focused engineer to define and implement DFT solutions for digital chip SOCs used in LEO communications. You will work with ASIC teams to embed MBIST, clock controls, and JTAG, ensuring fault coverage and adherence to timing and power targets.

Preferred candidates have advanced degrees and 7+ years of DFT experience, including RFIC exposure and AI-driven automation to streamline the workflow.

Qualifications

• Bachelor's degree in Electrical/Communications Engineering or equivalent experience.
• 5+ years in advanced DFT for deep sub-micron nodes.
• Experience automating DFT insertion and validation.

Responsibilities

• Architect and define DFT solutions for LEO chips.
• Collaborate with ASIC design teams to integrate DFT logic (MBIST, clock controls, JTAG).
• Ensure blocks meet DFT, timing and power targets with the implementation team.
• Translate ATE patterns to tester formats with Test engineering.
• Collaborate with RFIC teams on mixed-signal chips.
• Assist digital bring-up with the test team.

Skills

DFT techniques

Scripting for DFT

Sub-micron tech

RFIC collaboration

Education

Bachelor's degree in Electrical/Communications Engineering

Master's or Ph.D in Electrical/Communications Engineering

Tools

MBIST

JTAG

Job description

Amazon is seeking a DFT-focused engineer to define and implement DFT solutions for digital chip SOCs used in LEO communications. You will work with ASIC teams to embed MBIST, clock controls, and JTAG, ensuring fault coverage and adherence to timing and power targets.

Preferred candidates have advanced degrees and 7+ years of DFT experience, including RFIC exposure and AI-driven automation to streamline the workflow.