Senior DFT Design Engineer for ASIC/SoC

Analog Devices, Inc.; Dallas (TX); On-site; USD 100,000 - 150,000; Full time

Job summary

Analog Devices, Inc. in Dallas is seeking an experienced ASIC/SoC DFT engineer with a Master of Science in Electrical Engineering or Computer Engineering and at least 2 years of related experience.

You will lead DFT specifications, architecture and insertion, while supporting High Coverage, Low Power and Low Test Time scan patterns, plus pre/post-silicon verification and debugging. The role requires scripting (Perl/Python/Tcl), excellent communication, and teamwork.

Qualifications

• MS in Electrical or Computer Engineering or similar.
• 2 years of directly related experience in ASIC/SoC DFT.
• Hands-on DFT architecture, scan insertion and ATPG tool experience.
• Scripting: Perl, Python or Tcl; strong communication skills.

Responsibilities

• DFT specifications, architecture and implementation using state-of-the-art methodologies and tools.
• Support various product lines for DFT insertion and high coverage, low power, low test time scan patterns.
• Pre/post silicon verification & debug; team collaboration.

Skills

DFT architecture

ATPG/Scan insertion

Gate-level simulation

Perl/Python/Tcl scripting

Team-player

Strong written and verbal comms

Education

Master of Science in Electrical Engineering or Computer Engineering

Tools

Tessent DFT tools

ATPG Tool

Gate-level simulation tools

LBIST/MBIST concepts

Job description

Analog Devices, Inc. in Dallas is seeking an experienced ASIC/SoC DFT engineer with a Master of Science in Electrical Engineering or Computer Engineering and at least 2 years of related experience.

You will lead DFT specifications, architecture and insertion, while supporting High Coverage, Low Power and Low Test Time scan patterns, plus pre/post-silicon verification and debugging. The role requires scripting (Perl/Python/Tcl), excellent communication, and teamwork.