Senior ASIC Validation Engineer, NetSec & AI-Driven Testing

Palo Alto Networks, Inc.; Santa Clara (CA); On-site; USD 156,000 - 253,000; Full time

Job summary

Palo Alto Networks, Inc. is seeking a Silicon Validation Engineer for the ASIC team. You will define validation methodologies, develop infrastructure, write tests, execute plans, and debug to ensure ASICs meet stringent requirements for performance and reliability.

You will validate networking ASIC functionality for packet processing, switching, routing, cryptography, and high-speed interfaces, building robust Python and C automation solutions.

Qualifications

• BS or MS in EE, CE, or CS or equivalent experience.
• 5+ years of relevant silicon validation experience.
• Proven success in taking ASICs to mass production.
• Proficiency with lab equipment, logic analyzers, and oscilloscopes.
• Background in validating high-speed interfaces: Ethernet, PCIe, DDR, HBM.
• Expertise in Python and C.
• Experience integrating AI tools into design, scripting, or validation workflows.
• Familiarity with SystemVerilog and ASIC verification tools (e.g. VCS, Verdi).
• Experience with networking and cybersecurity is preferred.
• Demonstrated ownership, planning, and cross-functional collaboration.

Responsibilities

• Create silicon validation plans with ASIC, system hardware, and software engineers.
• Develop validation methodologies and infrastructure using lab equipment and platforms.
• Execute all aspects of silicon validation test plans.
• Debug cross-functional issues to validate ASIC correctness.
• Build programs in Python and C to automate testing, regression, and debugging.

Skills

Python

C

AI tools integration

Networking knowledge

Leadership

Communication

Education

BS or MS in EE, CE, or CS

Tools

Logic analyzers

Oscilloscopes

SystemVerilog

VCS

Verdi

Job description

Palo Alto Networks, Inc. is seeking a Silicon Validation Engineer for the ASIC team. You will define validation methodologies, develop infrastructure, write tests, execute plans, and debug to ensure ASICs meet stringent requirements for performance and reliability.

You will validate networking ASIC functionality for packet processing, switching, routing, cryptography, and high-speed interfaces, building robust Python and C automation solutions.