Senior ASIC Physical Design Lead

Meta; Sunnyvale (CA); On-site; USD 178,000 - 250,000; Full time

Job summary

Meta is seeking an experienced engineer to lead the physical design of complex ASIC blocks, overseeing the entire implementation flow. You will define methodologies and optimize designs to meet power, performance, and area targets.

The ideal candidate has over eight years of ASIC physical design experience, proficiency with key industry-standard EDA tools, and a strong background in cross-functional collaboration. Compensation ranges from $178,000 to $250,000, plus bonuses and equity.

Qualifications

• 8+ years of experience in ASIC physical design, from floorplanning to tapeout.
• Experience with static timing analysis and multi-corner multi-mode closure.
• Familiarity with low-power design techniques.

Responsibilities

• Lead physical implementation of complex ASIC blocks.
• Define and drive physical design methodology and best practices.
• Perform timing analysis and ensure timing closure.

Skills

ASIC physical design

EDA tools knowledge (Synopsys, Cadence)

Static timing analysis

Cross-functional collaboration

Scripting (Python, Tcl)

Education

Bachelor's degree in Computer Science or related field

Tools

Synopsys IC Compiler

Cadence Innovus

Primetime

Calibre

Job description

Meta is seeking an experienced engineer to lead the physical design of complex ASIC blocks, overseeing the entire implementation flow. You will define methodologies and optimize designs to meet power, performance, and area targets.

The ideal candidate has over eight years of ASIC physical design experience, proficiency with key industry-standard EDA tools, and a strong background in cross-functional collaboration. Compensation ranges from $178,000 to $250,000, plus bonuses and equity.