Senior ASIC Digital Design & Verification Lead

Synopsys, Inc.; Austin (TX); On-site; USD 160,000 - 230,000; Full time

Job summary

Synopsys, Inc. is seeking an experienced engineer to lead the design and verification of complex ASIC blocks and systems. You will collaborate with analog, physical design, and applications engineering to ensure seamless integration and performance goals are met.

The role emphasizes developing thorough test plans, using advanced EDA tools, and driving power-efficient designs while mentoring peers in a fast-paced environment.

Qualifications

• BSEE/MSEE with 10+ years of experience in ASIC digital design and verification.
• Proficiency with industry-standard EDA tools for design and verification.
• Deep understanding of PCIe, CXL, DDR memory interfaces, Ethernet IP protocols in ASICs.
• Strong analytical and problem-solving skills; able to collaborate across teams.
• Excellent communication with cross-functional stakeholders.

Responsibilities

• Lead design and verification of complex ASIC blocks and systems to meet specs and performance goals.
• Collaborate with analog, physical design, and applications engineering for seamless integration.
• Develop and execute comprehensive test plans to verify functionality and performance.
• Use advanced EDA tools and methodologies to optimize design performance and power.

Skills

RTL design

ASIC verification

cross-functional collaboration

problem solving

Education

BSEE / MSEE

Tools

EDA tools

PCIe / CXL / DDR / Ethernet IP

Job description

Synopsys, Inc. is seeking an experienced engineer to lead the design and verification of complex ASIC blocks and systems. You will collaborate with analog, physical design, and applications engineering to ensure seamless integration and performance goals are met.

The role emphasizes developing thorough test plans, using advanced EDA tools, and driving power-efficient designs while mentoring peers in a fast-paced environment.