Senior ASIC Packaging SI/PI Lead — 2.5D & High-Speed

Cisco; Cary (NC); Remote; USD 160,000 - 230,000; Full time

Job summary

Cisco Silicon One seeks a highly qualified Signal and Power Integrity Technical Lead to shape, design, and verify next-generation ASIC packaging. You will drive ultra-high-speed signal integrity, collaborate with layout and packaging teams, and lead complex SI/PI analyses across interposer, substrate, and PCB contexts.

Join a world-class ASIC team delivering cutting-edge solutions across high-performance networks and data centers, with opportunities to mentor engineers and influence hardware

Qualifications

• Bachelor's degree in Electrical Engineering with extensive industry experience required.
• Strong background in high-speed signaling and power integrity theory.
• Experience with SI/PI simulations using industry-standard tools.

Responsibilities

• Develop, document, and implement design rules for ultra-high-speed signaling.
• Analyze substrate SI and PI and collaborate with layout to optimize solutions.
• Design and develop ASIC packages with post-layout extraction and reporting.
• Collaborate with partners to resolve complex technical issues using advanced design rules.
• Define processes and tools for complex ASIC/package developments.
• Lead or participate in chip architecture discussions for high-performance ASICs.
• Mentor signal integrity team and influence packaging/hardware groups.
• Promote design reviews and continuous improvement across teams.

Skills

High-Speed Design & Theory

SI/PI Simulation Proficiency

Circuit Analysis

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering

PhD in Electrical Engineering

Tools

Cadence Sigrity

Cadence APD

Ansys HFSS

Keysight ADS

Ansys EM flows

SPICE

Job description

Cisco Silicon One seeks a highly qualified Signal and Power Integrity Technical Lead to shape, design, and verify next-generation ASIC packaging. You will drive ultra-high-speed signal integrity, collaborate with layout and packaging teams, and lead complex SI/PI analyses across interposer, substrate, and PCB contexts.

Join a world-class ASIC team delivering cutting-edge solutions across high-performance networks and data centers, with opportunities to mentor engineers and influence hardware