Senior ASIC Packaging SI/PI Engineer (Hybrid)

Cisco Systems, Inc.; San Jose (CA); On-site; USD 140,000 - 210,000; Full time

Job summary

Cisco Silicon One is seeking a qualified Signal and Power Integrity Engineer to develop ASIC packaging for deployment in Cisco platforms. You will contribute to ultra-high-speed signaling, substrate SI/PI analysis, and post-layout validation within a cutting-edge ASIC team in San Jose, CA.

You will collaborate with system partners and layout teams to resolve complex issues, design high-volume ASIC packages, and perform comprehensive SI/PI measurements using VNA, TDR, and related tools.

Qualifications

• Bachelor's degree with 2 years related experience or Master's degree with 0 years related experience.
• Advanced high-speed design concepts including Transmission Line Theory, electromagnetics, S-parameters, impedance networks for 56G PAM4 SerDes.
• Experience in pre-/post-layout SI/PI analysis with tools like Cadence Sigrity, Ansys HFSS, Keysight ADS and/or physical validation via layout reviews and EM flows; lab measurements via VNA, TDR.
• Experience planning and executing SI/PI measurements including VNA, TDR, impedance profiling, insertion/return loss, and full channel characterization.
• Experience performing SI/PI characterization, validation, and debug with high-bandwidth oscilloscopes, spectrum/network analyzers, and probe stations.

Responsibilities

• Develop, document and implement design rules for ultra-high-speed signaling to meet power, performance, and area goals.
• Analyze substrate SI/PI and collaborate with layout team for optimal interposer, substrate, and PCB solutions.
• Design and develop ASIC packages for high-volume, high-quality releases with post-layout extraction and reporting.
• Collaborate with system partners, vendors and leads to resolve complex SI/PI issues using advanced design rules.

Skills

High-Speed Design

SI/PI Simulation

Measurement Planning

Debugging

Collaboration

Education

Bachelor's degree in Electrical Engineering or related

Master's degree in Electrical Engineering or related

Tools

Cadence Sigrity

Ansys HFSS

Keysight ADS

Cadence APD

Job description

Cisco Silicon One is seeking a qualified Signal and Power Integrity Engineer to develop ASIC packaging for deployment in Cisco platforms. You will contribute to ultra-high-speed signaling, substrate SI/PI analysis, and post-layout validation within a cutting-edge ASIC team in San Jose, CA.

You will collaborate with system partners and layout teams to resolve complex issues, design high-volume ASIC packages, and perform comprehensive SI/PI measurements using VNA, TDR, and related tools.