High-Speed ASIC Packaging SI/PI Engineer

AnySilicon; San Jose (CA); On-site; USD 120,000 - 180,000; Full time

Job summary

Cisco Silicon One in San Jose, CA is seeking a Signal and Power Integrity Engineer to join its specialized ASIC team. You will develop and verify next-generation ASIC packaging, ensuring high performance and reliability in complex silicon designs.

Responsibilities include creating design rules for ultra-high-speed signaling, analyzing SI/PI across interposer, substrate, and PCB, and collaborating with system partners to resolve tough technical issues.

Qualifications

• Bachelors with 2 years of related experience or Masters with 0 years.
• Experience with high-speed design principles and SI/PI analysis using industry tools.
• Experience with pre- and post-layout SI/PI analysis and lab measurements.

Responsibilities

• Develop, document, and implement design rules for ultra-high-speed signaling to meet power, performance, and area goals.
• Analyze substrate SI and PI, collaborating with layout to optimize interposer, substrate, and PCB solutions.
• Design and develop ASIC packages for high-volume releases, including post-layout extraction and reporting.
• Collaborate with partners and design leads to resolve complex technical issues.

Skills

High-speed design principles

Transmission Line Theory

Impedance network analysis

SI/PI characterization

Measurement planning

Education

Bachelor's degree in related field

Master's degree in related field

Tools

Cadence Sigrity

Ansys HFSS

Job description

Cisco Silicon One in San Jose, CA is seeking a Signal and Power Integrity Engineer to join its specialized ASIC team. You will develop and verify next-generation ASIC packaging, ensuring high performance and reliability in complex silicon designs.

Responsibilities include creating design rules for ultra-high-speed signaling, analyzing SI/PI across interposer, substrate, and PCB, and collaborating with system partners to resolve tough technical issues.