Senior ASIC Digital Architect & IP Integration Lead

Synopsys, Inc.; Austin (TX); On-site; USD 180,000 - 240,000; Full time

Benefits offered by this job

Health benefits

Professional development

Job summary

Synopsys, Inc. is seeking an experienced ASIC Digital Architect in Austin to lead RTL design and verification at chip and block levels.

You will define design plans for complex digital designs and focus on high-speed IO protocols such as DDR, PCIe, UCIe, and Ethernet, collaborating with cross-functional teams to ensure integration and performance. You will mentor engineers, apply advanced design methodologies, and communicate with stakeholders to align goals.

Qualifications

• BSEE/MSEE and strong RTL design background.
• Extensive experience with DDR, PCIe, UCIe, or Ethernet IO protocols.
• Proficiency with advanced digital design tools and methodologies.
• Excellent communication and mentoring skills.

Responsibilities

• Define and develop ASIC RTL design and verification at chip and block levels.
• Create and execute design plans for complex digital designs, focusing on high-speed IO protocols including DDR, PCIe, UCIe, and Ethernet technologies.
• Collaborating with cross-functional teams to ensure seamless integration and functionality of designs.
• Utilizing advanced design and verification methodologies and tools to achieve high-quality results.
• Mentoring engineers and promoting best practices, technical excellence, and continuous improvement.
• Communicating with internal and external stakeholders to align goals and deliverables.

Skills

ASIC RTL design

High-speed IO protocols

DDR

PCIe

UCIe

Ethernet

Digital design methodologies

Mentoring

Communication

Problem solving

Education

BSEE

MSEE

Job description

Synopsys, Inc. is seeking an experienced ASIC Digital Architect in Austin to lead RTL design and verification at chip and block levels.

You will define design plans for complex digital designs and focus on high-speed IO protocols such as DDR, PCIe, UCIe, and Ethernet, collaborating with cross-functional teams to ensure integration and performance. You will mentor engineers, apply advanced design methodologies, and communicate with stakeholders to align goals.