Senior ASIC Digital Design & Verification Engineer

Synopsys, Inc.; Austin (TX); On-site; USD 150,000 - 210,000; Full time

Job summary

Synopsys, Inc. is seeking an experienced ASIC Design and Verification Engineer in Austin to lead the development of high‑performance ASIC blocks and systems. You will collaborate across analog, physical design, and applications engineering to ensure seamless integration and adherence to specs.

We expect 8+ years in ASIC digital design and verification, strong RTL skills, and deep knowledge of PCIe/CXL/DDR/Ethernet interface IP. Excellent communication and problem-solving abilities are essential.

Qualifications

• BSEE/MSEE with 8+ years of experience in ASIC digital design and verification, including strong hands-on RTL design expertise.
• Proficiency in using industry-standard EDA tools and methodologies for design and verification.
• Deep understanding of High-Performance Interface IP protocols (PCI Express, CXL, DDR Memory Interfaces, Ethernet) and their implementation in ASIC designs.
• Strong analytical and problem-solving skills, with the ability to tackle complex and unique design challenges.
• Excellent communication skills, with the ability to effectively collaborate with cross-functional teams and stakeholders.

Responsibilities

• Leading the design and verification of complex ASIC blocks and systems, ensuring they meet all specifications and performance goals.
• Collaborating closely with cross-functional teams, including analog design, physical design, and applications engineering, to ensure seamless integration of all design components.
• Developing and executing comprehensive test plans to verify the functionality and performance of your designs.
• Utilizing advanced EDA tools and methodologies to optimize design performance and power efficiency.

Skills

RTL design

ASIC verification

EDA tools

Interface IP protocols

Analytical skills

Communication skills

Education

BSEE/MSEE

Tools

Cadence

Mentor Graphics

Synopsys Design Tools

Job description

Synopsys, Inc. is seeking an experienced ASIC Design and Verification Engineer in Austin to lead the development of high‑performance ASIC blocks and systems. You will collaborate across analog, physical design, and applications engineering to ensure seamless integration and adherence to specs.

We expect 8+ years in ASIC digital design and verification, strong RTL skills, and deep knowledge of PCIe/CXL/DDR/Ethernet interface IP. Excellent communication and problem-solving abilities are essential.