Senior ASIC Digital Design Engineer: RTL & Verification

Synopsys, Inc.; Austin (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

Synopsys, Inc. in Austin, Texas seeks an experienced ASIC Digital Design Engineer to design and verify complex ASIC blocks, delivering high-performance silicon across the design flow.

You will work with analog, physical design, and applications teams to enable successful integration and quality outcomes. You will develop robust test plans, apply industry-standard EDA tools, optimize for power, performance, and area, and mentor junior engineers while continuing to build technical depth.

Qualifications

• 8+ years of experience in ASIC design/verification.
• Strong RTL design expertise and verification skills.
• Proficiency with industry‑standard EDA tools and methodologies.
• Solid understanding of High‑Performance Interface IP protocols.
• Strong analytical and problem‑solving abilities and collaboration skills.

Responsibilities

• Design and verify complex ASIC blocks and subsystems to meet performance and quality goals.
• Collaborate with analog, physical design, and applications engineering teams for seamless integration.
• Develop and execute test plans to verify functionality, performance, and design quality.
• Apply industry-standard EDA tools and methodologies to optimize power, performance, and area.
• Mentor junior engineers and provide technical guidance for growth.
• Stay current with industry trends, tools, and best practices.

Skills

ASIC Digital Design

RTL Design & Verification

EDA Tools

IP Protocols

Analytical & Problem-Solving

Cross-Functional Collaboration

Communication Skills

Education

BSEE or BSCE +8 years experience

Tools

EDA Tools

Job description

Synopsys, Inc. in Austin, Texas seeks an experienced ASIC Digital Design Engineer to design and verify complex ASIC blocks, delivering high-performance silicon across the design flow.

You will work with analog, physical design, and applications teams to enable successful integration and quality outcomes. You will develop robust test plans, apply industry-standard EDA tools, optimize for power, performance, and area, and mentor junior engineers while continuing to build technical depth.