Senior ASIC Design & Verification Engineer

Synopsys, Inc.; Austin (TX); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Health benefits

Wellness program

Professional development

Financial benefits

Job summary

Synopsys, Inc. is seeking an experienced ASIC Design Engineer in Austin to lead design and verification of complex ASIC blocks and systems.

You will work with analog, physical design, and applications engineering to ensure seamless integration and top performance. The role requires hands-on RTL design experience, strong problem-solving skills, and proficiency with industry-standard EDA tools to optimize power, performance and area.

Qualifications

• BSEE/MSEE with 5+ years of experience in ASIC digital design and verification.
• Hands-on RTL design experience with strong debugging skills.
• Proficiency with industry-standard EDA tools and methodologies.

Responsibilities

• Leading the design and verification of complex ASIC blocks and systems to meet specifications and performance goals.
• Collaborating with analog, physical design, and applications engineering for seamless integration of components.
• Developing and executing comprehensive test plans to verify functionality and performance.
• Utilizing advanced EDA tools and methodologies to optimize design performance and power efficiency.

Skills

RTL design

ASIC verification

EDA tools

PCIe/CXL interfaces

Education

BSEE/MSEE

Tools

EDA tools

Job description

Synopsys, Inc. is seeking an experienced ASIC Design Engineer in Austin to lead design and verification of complex ASIC blocks and systems.

You will work with analog, physical design, and applications engineering to ensure seamless integration and top performance. The role requires hands-on RTL design experience, strong problem-solving skills, and proficiency with industry-standard EDA tools to optimize power, performance and area.