Senior ASIC Digital Design Engineer: RTL & HP Silicon

Synopsys Inc; Austin (TX); On-site; USD 150,000 - 210,000; Full time

Job summary

Synopsys Inc. is seeking an experienced ASIC Digital Design Engineer in Austin to drive high-performance silicon development.

You will design and verify complex ASIC blocks, work closely with analog, physical design, and applications teams, and develop thorough test plans to ensure reliability and quality. The role requires strong RTL design and verification skills, proficiency with EDA tools, and the ability to mentor junior engineers while staying current with industry trends and best

Qualifications

• BSEE/BSCE with 6+ years of industry experience.
• Strong experience in ASIC digital design and verification with RTL expertise.
• Proficiency with industry-standard EDA tools and verification methodologies.
• Knowledge of High-Performance Interface IP protocols and ASIC implementation considerations.
• Strong analytical, problem-solving and collaborative skills.

Responsibilities

• Design and verify complex ASIC blocks and subsystems to meet functional, performance, and quality goals.
• Collaborate with analog, physical design and applications engineering teams across the design flow.
• Develop and execute test plans to verify functionality, performance, and design quality.
• Apply industry-standard EDA tools and methodologies to improve power, performance, and area outcomes.
• Solve complex technical issues within your ownership and contribute to team problem-solving.
• Mentor junior engineers and provide technical guidance for growth.
• Stay current with industry trends, tools, and best practices while building technical depth.

Skills

RTL design

ASIC design

Verification

EDA tools

Cross-functional collaboration

Education

BSEE or BSCE

Tools

EDA tools

Job description

Synopsys Inc. is seeking an experienced ASIC Digital Design Engineer in Austin to drive high-performance silicon development.

You will design and verify complex ASIC blocks, work closely with analog, physical design, and applications teams, and develop thorough test plans to ensure reliability and quality. The role requires strong RTL design and verification skills, proficiency with EDA tools, and the ability to mentor junior engineers while staying current with industry trends and best