Senior ASIC Digital Architect | DDR/PCIe/UCIe Protocols

Synopsys Inc; Austin (TX); On-site; USD 180,000 - 280,000; Full time

Job summary

Synopsys Inc is seeking an experienced ASIC Digital Architect to define and drive RTL design and verification at both chip and block levels. You will create design plans for DDR, PCIe, CXL, UAL, and UCIe IO protocols and work with cross-functional teams to ensure seamless integration and high-quality results.

You will mentor junior engineers, promote best practices, and guide the architectural direction while communicating with stakeholders to align on goals and deliverables in a fast-paced

Qualifications

• Experience in ASIC RTL design and verification.
• In-depth knowledge of DDR, PCIe, UAL, UCIe IO protocols and their applications.
• Strong leadership and mentoring abilities.

Responsibilities

• Defining and developing ASIC RTL design and verification at both chip and block levels.
• Creating and executing design plans for complex digital designs, particularly focusing on DDR, PCIe, CXL, UAL, UCIe IO protocols.
• Collaborating with cross-functional teams to ensure seamless integration and functionality of designs.
• Utilizing advanced design and verification methodologies and tools to achieve high-quality results.
• Mentoring and guiding junior engineers, promoting best practices, and fostering a culture of continuous improvement.
• Communicating with internal and external stakeholders to align on project goals and deliverables.

Skills

ASIC RTL design

DDR protocols

PCIe protocols

CXL protocols

UAL architecture

Leadership

Mentoring

Communication

Education

BSEE/BSCE +12+ years

Job description

Synopsys Inc is seeking an experienced ASIC Digital Architect to define and drive RTL design and verification at both chip and block levels. You will create design plans for DDR, PCIe, CXL, UAL, and UCIe IO protocols and work with cross-functional teams to ensure seamless integration and high-quality results.

You will mentor junior engineers, promote best practices, and guide the architectural direction while communicating with stakeholders to align on goals and deliverables in a fast-paced