Senior ASIC DFT Engineer - Test & Automation

Cisco Systems

San Jose (CA)

On-site

USD 120,000 - 190,000

Full time

14 days+
Application generator

Get a reply from this employer — a resume and cover letter tailored to exactly what they’re hiring for.

Get past ATS filters

Job summary

Cisco Systems in San Jose seeks an ASIC Design for Test Engineer focused on Design-for-Test (DFT). You will work with frontend RTL and backend PD teams to drive DFT requirements early in the design cycle and implement hardware DFT features.

The role emphasizes automation scripting (Python/Tcl/Perl), experience with SystemVerilog, ATPG/EDA tools like TestMax and PrimeTime, and collaboration across design verification and physical design.

Qualifications

  • Master's degree with 0 years of work experience or Bachelor's with 2 years of work experience.
  • ASIC Engineering or related field.
  • Knowledge of JTAG, scan architectures, and BIST.

Responsibilities

  • Implement the Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug, and diagnostics needs of the designs.
  • Create and enhance automation scripts to improve implementation robustness and efficiency.
  • Work closely with the Design, Design Verification, and Physical Design teams to enable the integration and validation of the Test logic in all phases of the implementation and post silicon validation flows.
  • Collaborate with team members to validate test timing and logic equivalency of designs using SystemVerilog.
  • Utilize ATPG and EDA tools (TestMax,Tetramax,Tessent,PrimeTime) for test pattern generation and analysis.

Skills

DFT
SystemVerilog
Python scripting
VCS debugging
JTAG/scan

Education

Master's degree in ASIC Engineering or related
Bachelor's degree with 2 years of work experience

Tools

TestMax
Tetramax
Tessent
PrimeTime

Job description

Cisco Systems in San Jose seeks an ASIC Design for Test Engineer focused on Design-for-Test (DFT). You will work with frontend RTL and backend PD teams to drive DFT requirements early in the design cycle and implement hardware DFT features.

The role emphasizes automation scripting (Python/Tcl/Perl), experience with SystemVerilog, ATPG/EDA tools like TestMax and PrimeTime, and collaboration across design verification and physical design.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Innovative ASIC DFT Engineer - Design for Test
Innovative ASIC DFT Engineer - Design for Test

Cisco Systems, Inc. • San Jose (CA)

On-site
USD 120,000 - 190,000
Health insurance
401(k) matching
Paid parental leave
+2
ASIC DFT Engineer
ASIC DFT Engineer

Cisco Systems, Inc. • San Jose (CA)

On-site
USD 120,000 - 150,000
DFT Engineer - ASIC Test & Automation Specialist
DFT Engineer - ASIC Test & Automation Specialist

Anysilicon • San Jose (CA), Northern (KY)

Hybrid
USD 120,000 - 150,000
Senior DFT Engineer for ASIC/SoC Test & Validation
Senior DFT Engineer for ASIC/SoC Test & Validation

Etched • San Jose (CA)

On-site
USD 160,000 - 230,000
Medical, dental, and vision insurance
Housing subsidy of $2k/month
Relocation support
+2
Senior ASIC Design Engineer: Front-End & DFT
Senior ASIC Design Engineer: Front-End & DFT

Advanced Micro Devices • San Jose (CA)

Hybrid
USD 120,000 - 180,000
Senior DFT ASIC Engineer: Testability & Bring-Up
Senior DFT ASIC Engineer: Testability & Bring-Up

Meta Careers • Sunnyvale (CA), Northern (KY)

Hybrid
USD 150,000 - 210,000
ASIC DFT Engineer II Full Time – United States
ASIC DFT Engineer II Full Time – United States

Anysilicon • San Jose (CA), Northern (KY)

Hybrid
USD 120,000 - 160,000
Senior ASIC DFT Engineer — Post-Silicon Bringup & Test
Senior ASIC DFT Engineer — Post-Silicon Bringup & Test

United States Digital Space LLC • Austin (CA)

On-site
USD 165,000 - 260,000
Stock options
Long-term incentives
Medical, vision, dental insurance
+3
ASIC Design-for-Test (DFT)
ASIC Design-for-Test (DFT)

Accord Technologies Inc • San Jose (CA)

On-site
USD 150,000 - 200,000
DFT Engineer - SoC/ASIC Test & Validation
DFT Engineer - SoC/ASIC Test & Validation

MatchPoint • San Francisco (CA)

On-site
USD 120,000 - 180,000