Senior ASIC DFT & ATPG Engineer

Broadcom, Inc.; Fort Collins (CO); On-site; USD 129,000 - 207,000; Full time

Benefits offered by this job

Medical, dental and vision plans

401(K) participation including company

Employee Stock Purchase Program (ESPP)

Employee Assistance Program (EAP)

Company paid holidays

Paid sick leave and vacation time

Paid Family Leave and other leaves of

Job summary

Broadcom, Inc. is hiring a DFT Engineer for ASIC/Chip level ATPG at our Fort Collins Development Center. You will lead DFT programs from chip-level specification through implementation, verification, and product release to production.

The role covers SoC DFT activities, DFT architecture, test insertion, pattern generation, coverage improvement, post-silicon debug and yield improvements to meet test metrics. Proficiency in scripting and AI-augmented testing is valued.

Qualifications

• Experience with DFT architectures and chip-level implementation.
• Strong background in ATPG, pattern generation, and coverage improvement.
• Proficiency in Verilog, testbenches and timing constraints.

Responsibilities

• Lead DFT programs from spec to production release.
• Implement DFT architectures for ASICs and IP DFT integration.
• Gen and verify ATPG patterns; bring-up on ATE and silicon.

Skills

DFT architecture

ATPG

Verilog

Python

C++

AI-assisted testing

Education

Bachelors in Electrical/Electronic/Computer Engineering

Masters in Electrical/Electronic/Computer Engineering

Tools

DFT Compiler

TestKompress

TetraMax

FastScan

Job description

Broadcom, Inc. is hiring a DFT Engineer for ASIC/Chip level ATPG at our Fort Collins Development Center. You will lead DFT programs from chip-level specification through implementation, verification, and product release to production.

The role covers SoC DFT activities, DFT architecture, test insertion, pattern generation, coverage improvement, post-silicon debug and yield improvements to meet test metrics. Proficiency in scripting and AI-augmented testing is valued.