Senior ASIC Design Engineer - AI/ML Hardware

Apple, Inc.; Sunnyvale (CA); On-site; USD 185,000 - 325,000; Full time

Job summary

Apple, Inc. in Sunnyvale is seeking a design engineer for the ANE hardware team to advance RTL designs and integration for next-generation Apple Neural Engine. You will collaborate with architecture, verification, power, and physical design to deliver high-performance AI hardware.

Responsibilities include RTL design of high-speed subsystems, collaborating with verification, synthesis, timing, and DFT/BIST teams, and ensuring correct clock domain crossing and power intent across the SoC.

Qualifications

• BS degree and 10 years of experience in hardware design.
• Strong knowledge of computer architecture and high-speed subsystems.
• Experience with RTL design, verification, and timing analysis.

Responsibilities

• Do RTL design on high-speed, high-performance subsystems.
• Collaborate with verification and formal verification teams to verify design and performance.
• Work with physical design and static timing teams to produce quality netlists.
• Analyze clock-domain crossing design for correctness.
• Coordinate with DFT and BIST teams to ensure testability.

Skills

RTL design

Verification

Clock domain crossing

Power integrity

DFT/BIST

AMBA bus topology

High-speed subsystem design

Education

Bachelor of Science

Tools

Synthesis

Static Timing Analysis

Job description

Apple, Inc. in Sunnyvale is seeking a design engineer for the ANE hardware team to advance RTL designs and integration for next-generation Apple Neural Engine. You will collaborate with architecture, verification, power, and physical design to deliver high-performance AI hardware.

Responsibilities include RTL design of high-speed subsystems, collaborating with verification, synthesis, timing, and DFT/BIST teams, and ensuring correct clock domain crossing and power intent across the SoC.