SoC ML Design Engineer: AI-Driven RTL & Verification

Apple, Inc.; Cupertino (CA); On-site; USD 180,000 - 280,000; Full time

Job summary

Apple, Inc. in Cupertino is seeking an unusually talented engineer to advance SoC design machine learning efforts.

You will craft ML solutions for RTL design, verification and power/performance/area optimizations, collaborating with internal teams and the AIML organization to tailor AI to chip-design needs. The role requires deep ML expertise, experience with DL frameworks and HDL languages, and a strong math background.

Qualifications

• Minimum of BS with 10 years relevant industry experience.
• Practical experience with generative AI and modern ML methods.
• Experience with RAG systems including embedding models, retrieval strategies, and context optimization techniques.
• Experience with AI coding assistants and AI infrastructure protocols such as MCP.
• Experience with Deep neural networks and reinforcement learning.
• Solid math background and understanding of algorithms and data structures.
• Experience with PyTorch, TensorFlow, JAX or MLX.
• Experience with Verilog, SystemVerilog or VHDL.
• Chip design and verification front end flows; experience with UVM testbenches; front-end tools like Static timing analysis and CDC/RDC.
• Strong communication and collaboration skills.
• Master's or PhD with relevant publications preferred but not required.

Responsibilities

• Develop ML solutions for RTL Design, Verification and Power/Performance/Area optimizations.
• Collaborate with AIML organization and cross-functional teams to tailor machine learning for chip design.
• Stay current with emerging ML and chip-design technologies to keep solutions state-of-the-art.

Skills

Generative AI

ML methods

Deep learning

Reinforcement learning

Strong collaboration

Strong communication

Education

BS in CS/EE or related field

Master's or PhD preferred

Tools

PyTorch

TensorFlow

JAX

MLX

Verilog

SystemVerilog

VHDL

UVM

Static timing analysis

CDC/RDC

MCP

Job description

Apple, Inc. in Cupertino is seeking an unusually talented engineer to advance SoC design machine learning efforts.

You will craft ML solutions for RTL design, verification and power/performance/area optimizations, collaborating with internal teams and the AIML organization to tailor AI to chip-design needs. The role requires deep ML expertise, experience with DL frameworks and HDL languages, and a strong math background.