ASIC DMA Design Engineer for Neural Engine

Apple Inc.; Sunnyvale (CA); On-site; USD 129,000 - 195,000; Full time

Job summary

Apple Inc. is seeking an ASIC Design Engineer for the ANE DMA Design team to contribute to high-performance data movement between memory and the Apple Neural Engine. The role involves front-end design, RTL development, and collaboration across architecture, verification, and design teams.

You will address synthesis, timing closure, power analysis, and linting while ensuring design correctness and adherence to performance targets for on-device AI capabilities.

Qualifications

• Bachelor's degree in Electrical Engineering or related field.
• Familiarity with Verilog/SystemVerilog and digital design fundamentals.

Responsibilities

• Design DMA subsystem blocks from microarchitecture through tapeout.
• Write RTL structured for synthesis, timing, power, and area goals.
• Perform front-end implementation tasks: synthesis, timing closure, linting, and equivalence checks.
• Collaborate with architecture teams to meet performance and bandwidth targets.
• Coordinate with verification teams to ensure functional correctness of the design.

Skills

Digital design fundamentals

RTL concepts

SystemVerilog

Verilog

Education

Bachelor's degree in Electrical Engineering or related field

Tools

AMBA (AXI/AHB/APB)

Python

Job description

Apple Inc. is seeking an ASIC Design Engineer for the ANE DMA Design team to contribute to high-performance data movement between memory and the Apple Neural Engine. The role involves front-end design, RTL development, and collaboration across architecture, verification, and design teams.

You will address synthesis, timing closure, power analysis, and linting while ensuring design correctness and adherence to performance targets for on-device AI capabilities.