Remote Senior Physical Design Engineer - GF 12LP

Encore Semi, Inc.; United States; Remote; USD 135,000 - 165,000; Full time

Benefits offered by this job

PTO 15 days per year

Medical benefits (Company covers 80%+)

Dental & Vision coverage (Company pays

401k - Traditional & Roth

Life/AD&D and Long-Term Disability

Tuition reimbursement

Holidays 10 days per year

Employee Assistance Program

Job summary

Encore Semi, Inc. is seeking a Sr Physical Design Engineer to own the RTL-to-GDSII implementation for high-performance SoCs targeting GF 12LP. The role emphasizes advanced FinFET design challenges, PPA optimization, and robust timing closure while working 100% remote in the USA.

You will drive block- and top-level physical design, floorplanning, CTS, and signoff using Synopsys Fusion Design Platform, with hands-on scripting in Tcl or Python to streamline flows and improve runtimes.

Qualifications

• 5+ years of ASIC physical design experience on advanced FinFET nodes (14nm/12nm).
• Experience leading RTL-to-GDSII implementation flows.
• Strong SDC constraints and signoff knowledge.

Responsibilities

• Drive block- and top-level physical design from synthesis to GDSII signoff.
• Perform floorplanning, CTS, placement, routing, and power grid design.
• Lead STA, parasitic extraction, and multi-corner/multi-mode closure.
• Resolve FinFET physical challenges including double patterning, DRC/LVS, EM/IR-drop.
• Develop Tcl/Python scripts to streamline flows and track metrics.

Skills

ASIC physical design

Scripting Tcl/Python

STA/Timing

CDC/CTS

Tape-out experience

Education

BS in Electrical Engineering or Computer Engineering

Tools

Synopsys Fusion Compiler (or ICC II)

PrimeTime

StarRC

Job description

Encore Semi, Inc. is seeking a Sr Physical Design Engineer to own the RTL-to-GDSII implementation for high-performance SoCs targeting GF 12LP. The role emphasizes advanced FinFET design challenges, PPA optimization, and robust timing closure while working 100% remote in the USA.

You will drive block- and top-level physical design, floorplanning, CTS, and signoff using Synopsys Fusion Design Platform, with hands-on scripting in Tcl or Python to streamline flows and improve runtimes.