Senior Physical Design Engineer — Remote (GF 12LP)

Encore Semi Llc

San Diego (CA)

Remote

USD 135.000 - 165.000

Vollzeit

Vor 2 Tagen
Sei unter den ersten Bewerbenden
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Benefits dieser Stelle

15 days PTO per year
Medical benefits 80% premiums
Dental & Vision 50% premiums
401k - Traditional & Roth
Life Insurance & Disability

Zusammenfassung

Encore Semi, Inc. is seeking a Senior Physical Design Engineer to lead RTL-to-GDSII implementation for FinFET SoCs on GF 12LP, working 100% remotely in the USA. The role emphasizes ownership of P&R challenges and timing closure, with a focus on power, performance, and area.

You will drive floorplanning, CTS, routing, and signoff using Synopsys Fusion Compiler or ICC II and PrimeTime, while developing automation scripts to optimize flows and PPA metrics.

Qualifikationen

  • 5+ years of ASIC physical design experience with tape-outs on FinFET nodes.
  • Strong background in synthesis, P&R, CTS, and signoff methodologies.
  • Proficiency with scripting in Tcl, Python, or Perl.

Aufgaben

  • End-to-End Implementation: drive block- and top-level physical design from synthesis through GDSII signoff.
  • Core P&R & optimization: floorplanning, power grid design, placement, CTS, and routing for GF 12LP cells.
  • Timing & signoff: STA, extraction, multi-corner/multi-mode closure using PrimeTime/StarRC.
  • Physical verification & reliability: address FinFET challenges, DRC/LVS, EM/IR drop analysis.
  • Automation: develop Tcl and Python scripts to streamline flows and metrics.

Kenntnisse

ASIC physical design
Tape-out experience
Scripting (Tcl/Python/Perl)

Ausbildung

BS or MS in Electrical or Computer Engineering

Tools

Synopsys Fusion Compiler/ICC II
PrimeTime

Jobbeschreibung

Encore Semi, Inc. is seeking a Senior Physical Design Engineer to lead RTL-to-GDSII implementation for FinFET SoCs on GF 12LP, working 100% remotely in the USA. The role emphasizes ownership of P&R challenges and timing closure, with a focus on power, performance, and area.

You will drive floorplanning, CTS, routing, and signoff using Synopsys Fusion Compiler or ICC II and PrimeTime, while developing automation scripts to optimize flows and PPA metrics.

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