Quantum IC Substrate Layout Engineer (2.5D/3D Packaging)

Intel Corporation; Hillsboro, Northern (OR, KY); Hybrid; USD 122,000 - 173,000; Full time

Benefits offered by this job

Stock bonuses

Health insurance

Retirement plan

Vacation

Job summary

Intel Corporation's Quantum Computing Group in Hillsboro, Oregon seeks a Quantum IC Substrate Package Layout Design Engineer to design large form factor IC substrates within a multidisciplinary team, advancing silicon quantum dot technology.

You will use Siemens Xpedition, conduct DRC/LVS, support 2.5D/3D packaging, tapeouts with suppliers, and communicate designs to stakeholders while staying current with packaging trends.

Qualifications

• Bachelor's or Master's in Electrical/Computer Engineering with related IC substrate design experience.
• Experience with Siemens Xpedition environment and workflow is required.
• Familiarity with high-speed routing and large form factor substrates.

Responsibilities

• Design IC substrates using Siemens Xpedition and verify with DRC/LVS.
• Collaborate with silicon test, SI, PI, thermal, and systems engineers.
• Coordinate tapeout with substrate suppliers and Intel teams.
• Present designs and document milestones; stay current with packaging tech.

Skills

High-speed signal routing

Large form factor substrate experience

Education

B.S. in Electrical or Computer Engineering

M.S. in Electrical or Computer Engineering

Tools

Siemens Xpedition

Job description

Intel Corporation's Quantum Computing Group in Hillsboro, Oregon seeks a Quantum IC Substrate Package Layout Design Engineer to design large form factor IC substrates within a multidisciplinary team, advancing silicon quantum dot technology.

You will use Siemens Xpedition, conduct DRC/LVS, support 2.5D/3D packaging, tapeouts with suppliers, and communicate designs to stakeholders while staying current with packaging trends.