Principal Engineer: HBM Validation & Strategy

Micron Technology, Inc.; Boise (ID); On-site; USD 140,000 - 200,000; Full time

Job summary

Micron Technology, Inc. in Boise, ID seeks a Principal Engineer for the HBM New Product Validation team.

You will guide validation strategy and readiness for next‑gen HBM products, influencing architecture, test environments, and observability from pre-silicon through post-silicon characterization. You will lead investigations of complex DRAM/HBM issues, collaborate across engineering teams, and promote AI-enabled validation methods to improve efficiency and quality.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field with 8+ years of semiconductor experience.
• Proven expertise in pre-silicon and post-silicon debug of DRAM/HBM issues.
• Experience with Verilog/SystemVerilog, Python, Linux environments, and version control systems (Git, SVN, Perforce).
• Excellent problem-solving, analytical, communication, and technical presentation skills.

Responsibilities

• Define architecture-aware validation strategies and coverage direction for future-generation HBM products.
• Drive validation readiness by preparing strategies, test environments, and execution plans before first silicon.
• Evaluate new DRAM/HBM features and define validation requirements and testability needs.
• Develop validation strategies for new/high-risk features and promote reuse across product generations.
• Leverage memory architecture knowledge to define methodologies, identify risks early, ensure product readiness.
• Use Verilog/SystemVerilog simulation to identify validation gaps pre-silicon.

Skills

HBM architectures

Verilog/SystemVerilog

Python

Linux

Pre-silicon debugging

Post-silicon debugging

Version control (Git/SVN/Perforce)

Problem solving

Education

Electrical Engineering (B.S./M.S.)

Tools

Verilog

SystemVerilog

Oscilloscope

Logic Analyzer

Job description

Micron Technology, Inc. in Boise, ID seeks a Principal Engineer for the HBM New Product Validation team.

You will guide validation strategy and readiness for next‑gen HBM products, influencing architecture, test environments, and observability from pre-silicon through post-silicon characterization. You will lead investigations of complex DRAM/HBM issues, collaborate across engineering teams, and promote AI-enabled validation methods to improve efficiency and quality.