Senior HBM Validation Architect – AI-Driven, Pre/Post-Silicon

Micron; Boise (ID); On-site; USD 140,000 - 210,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time-off

Paid holidays

Job summary

Micron Technology is seeking a Principal Engineer for the HBM New Product Validation team in Boise, ID. You will lead validation strategy and readiness for future-generation High Bandwidth Memory products, applying deep DRAM/HBM architecture expertise to ensure robust product readiness.

You will collaborate across Design Engineering, Design Validation, Product Engineering, and Systems teams, guiding AI-enabled validation methodologies to improve efficiency, coverage, and observability throughout

Qualifications

• 8+ years of semiconductor proven experience in electrical engineering or related field.
• Proven expertise in both pre-silicon and post-silicon debug of DRAM/HBM issues.
• Experience with Verilog/SystemVerilog, Python, Linux environments, and version control systems.

Responsibilities

• Define architecture-aware validation strategies and coverage for future-generation HBM products.
• Drive validation readiness with strategies, test environments, and execution plans before first silicon.
• Evaluate new DRAM/HBM features and define validation requirements before DBR.
• Develop validation strategies for new features and promote reuse across generations.
• Leverage memory architecture knowledge to define methodologies, risks, and robust readiness.
• Use Verilog/SystemVerilog simulations to identify validation gaps pre-silicon.

Skills

Verilog/SystemVerilog

Python

Timing characterization

DRAM/HBM architecture

Pre/Post-silicon debug

Linux environments

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

Git/SVN/Perforce

Job description

Micron Technology is seeking a Principal Engineer for the HBM New Product Validation team in Boise, ID. You will lead validation strategy and readiness for future-generation High Bandwidth Memory products, applying deep DRAM/HBM architecture expertise to ensure robust product readiness.

You will collaborate across Design Engineering, Design Validation, Product Engineering, and Systems teams, guiding AI-enabled validation methodologies to improve efficiency, coverage, and observability throughout