Senior HBM Validation Engineer (AI-Driven)

Micron Technology, Inc; Folsom (CA); On-site; USD 145,000 - 247,000; Full time

Job summary

Micron Technology, Inc. is seeking a Principal Engineer to lead validation of advanced HBM products in its Product Engineering Component Validation team.

You will compose validation coverage, drive debug, and perform root-cause analysis across test modes to achieve zero-escape validation, using AI-enabled tooling to accelerate tasks. The role requires 6+ years in memory semiconductor validation with strong DRAM/HBM knowledge, proficiency in Linux, Python/C/C++, Verilog, and UVM.

Qualifications

• Bachelor's or Master's in Electrical/Computer Engineering with at least 6 years of relevant experience.
• Strong understanding of DRAM and HBM memory concepts.
• Experience reading and debugging circuit schematics to isolate failure causes.
• Extensive post-silicon validation and electrical failure analysis experience.
• Proficiency in Linux, Python/C/C++, Verilog, UVM, and version control systems.

Responsibilities

• Translate DRAM/HBM intent into verification scope and test cases.
• Validate new high-risk features with Design Validation and Systems Engineering.
• Review specifications and provide design feedback in reviews.
• Read and debug circuit blueprints to detect failure mechanisms.
• Perform root-cause analysis on electrical failures and distinguish issues.
• Apply automation and tooling (Python, C, C++) to speed validation.
• Adopt AI-enabled workflows to improve efficiency and turnaround.

Skills

DRAM/HBM knowledge

Schematic debugging

Post-silicon validation

Linux

Python

C/C++

Verilog

UVM

Git/Version control

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

Verilog

UVM

Git

SVN

Perforce

Job description

Micron Technology, Inc. is seeking a Principal Engineer to lead validation of advanced HBM products in its Product Engineering Component Validation team.

You will compose validation coverage, drive debug, and perform root-cause analysis across test modes to achieve zero-escape validation, using AI-enabled tooling to accelerate tasks. The role requires 6+ years in memory semiconductor validation with strong DRAM/HBM knowledge, proficiency in Linux, Python/C/C++, Verilog, and UVM.