Power Design Manager for AI/TPU SoC

Google Inc.; Sunnyvale (CA); On-site; USD 192,000 - 279,000; Full time

Benefits offered by this job

Equity

Job summary

Google seeks a Power Design Manager to lead a team designing power architecture for TPU accelerators in Sunnyvale, CA. You will direct power optimization across large SoCs and drive cross‑functional collaboration with IP vendors and software teams.

The role emphasizes ownership of power modeling, DVFS techniques, and strategies to meet aggressive power and performance targets in AI/ML hardware.

Qualifications

• Bachelor's degree or equivalent practical experience in engineering field.
• 10 years of ASIC/SoC design experience is required.
• Experience with power design, modeling, and reduction techniques.

Responsibilities

• Shape the future of AI/ML hardware acceleration and TPU technology.
• Provide technical leadership for power design teams and execute complex projects.
• Drive power architecture, design and verification for SoCs with focus on low power.
• Collaborate across IP, vendors, and internal teams to meet power goals.

Skills

Power design

Power modeling

Power optimization

TPU architecture

Leadership

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.

Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science (preferred).

Job description

Google seeks a Power Design Manager to lead a team designing power architecture for TPU accelerators in Sunnyvale, CA. You will direct power optimization across large SoCs and drive cross‑functional collaboration with IP vendors and software teams.

The role emphasizes ownership of power modeling, DVFS techniques, and strategies to meet aggressive power and performance targets in AI/ML hardware.