Senior ASIC Power Architect for ML Accelerators

Google

Sunnyvale (CA)

On-site

USD 163,000 - 236,000

Full time

36 hours ago
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Benefits offered by this job

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Benefits

Job summary

Google is seeking an ASIC Design Engineer to shape AI/ML hardware acceleration by developing power-efficient TPU architectures and associated power models. You will verify complex digital designs and contribute to power optimization strategies within TPU projects and data-center accelerators.

The role involves collaborating with cross-functional teams to drive power efficiency from design through verification, impacting Google's cutting-edge AI hardware used globally.

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field or equivalent practical experience.
  • 8+ years of experience in silicon design or architecture (logic design, power architecture, performance, or SoC design).
  • Experience with power design, power modeling, power architecture, or power reduction methodologies/techniques.

Responsibilities

  • Contribute to power modeling and drive convergence to power goals.
  • Investigate, specify, and deploy architectural and microarchitectural power optimization techniques.
  • Define best practices and methodologies to achieve low-power designs.
  • Collaborate with cross-functional software and system teams to create novel power management architectures to meet power goals.

Skills

Power modeling
Power architecture
Power reduction techniques
Open-ended power/performance problem

Education

Bachelor's degree (EE/CE/CS or related)
Master's degree (EE/CE/CS)
PhD (EE/CE/CS)

Job description

Google is seeking an ASIC Design Engineer to shape AI/ML hardware acceleration by developing power-efficient TPU architectures and associated power models. You will verify complex digital designs and contribute to power optimization strategies within TPU projects and data-center accelerators.

The role involves collaborating with cross-functional teams to drive power efficiency from design through verification, impacting Google's cutting-edge AI hardware used globally.

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