Senior TPU AI Hardware Co-Design Engineer

Google LLC; Sunnyvale (CA); On-site; USD 192,000 - 278,000; Full time

Job summary

Google LLC in Sunnyvale, CA is hiring a Performance Co-Design Engineer for Google Cloud TPU. You will shape AI/ML hardware acceleration, drive TPU architecture and integration with ML systems, and collaborate across hardware designers, software architects, and ML researchers.

The role emphasizes end-to-end design and verification of TPU components, working within Google’s AI and Infrastructure teams to deliver high-performance, power-efficient accelerators for cutting-edge models.

Qualifications

• Bachelor's degree or equivalent experience in EE/CE/CS or related field.
• 10 years of experience in computer architecture, chip architecture, or hardware-software co-design.
• Experience developing systems for performance modeling, simulation, or system analysis.

Responsibilities

• Define and optimize the hardware/software stack for performant training and serving of large ML models.
• Collaborate with research and modeling teams to drive architectural innovations for ML workloads.
• Lead development of configurable architectural simulators and cycle-accurate performance models.

Skills

Computer architecture

Chip architecture

Hardware-software co-design

Performance modeling

System analysis

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field

Tools

TensorFlow

PyTorch

Job description

Google LLC in Sunnyvale, CA is hiring a Performance Co-Design Engineer for Google Cloud TPU. You will shape AI/ML hardware acceleration, drive TPU architecture and integration with ML systems, and collaborate across hardware designers, software architects, and ML researchers.

The role emphasizes end-to-end design and verification of TPU components, working within Google’s AI and Infrastructure teams to deliver high-performance, power-efficient accelerators for cutting-edge models.