Physical Design Engineer for Space ASICs

InvestedintheMission; Palo Alto (CA); On-site; USD 135,000 - 210,000; Full time

Benefits offered by this job

Stock options

401(k) plan

Medical, dental, vision

Paid vacation

Parental leave

Employee discounts

Holiday pay

Job summary

SpaceX is seeking a Physical Design Engineer (Silicon Engineering) to join the ASIC team delivering next-generation chips for Starlink. You’ll collaborate with systems, firmware, architecture and design teams to push the performance and reliability of space-grade silicon.

In this role you will perform partition synthesis, P&R and signoff tasks, help set timing/power/area targets, and drive design goals from RTL through GDSII. A strong scripting and EDA background is essential for success.

Qualifications

• Bachelor's degree in electrical engineering, computer engineering or computer science.
• 1+ years of professional experience working on RTL2GDSII physical design and/or physical design flow development.
• Experience with industry standard EDA tools including understanding of their capabilities and underlying algorithms.

Responsibilities

• Perform partition synthesis and physical implementation steps (e.g. synthesis, floorplanning, power/ground grid generation, place and route, timing, noise, physical verification, electromigration, voltage drop, logic equivalency and other signoff checks)
• Develop/improve physical design methodologies and automation scripts for various implementation steps
• Closely collaborate with the ASIC design team to drive architectural feasibility studies, develop timing, power and area design targets, and explore RTL/design tradeoffs
• Resolve design/timing/congestion and flow issues, identify potential solutions and drive execution
• Run, debug, and fix signoff closure issues in static timing analysis (STA), noise, logic equivalency, physical verification, electromigration and voltage drop

Skills

RTL to GDSII

Physical design

EDA tools

Scripting

CMOS FinFET knowledge

Education

Bachelor's degree in electrical engineering, computer engineering or computer science

Tools

EDA tools

DFT/MBIST

Job description

SpaceX is seeking a Physical Design Engineer (Silicon Engineering) to join the ASIC team delivering next-generation chips for Starlink. You’ll collaborate with systems, firmware, architecture and design teams to push the performance and reliability of space-grade silicon.

In this role you will perform partition synthesis, P&R and signoff tasks, help set timing/power/area targets, and drive design goals from RTL through GDSII. A strong scripting and EDA background is essential for success.