Next-Gen ASIC Physical Design Engineer

SpaceX

Austin (TX)

On-site

USD 90,000 - 150,000

Full time

3 days ago
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Job summary

SpaceX is seeking a Physical Design Engineer (Silicon Engineering) to develop next‑gen ASICs for Starlink satellites and ground systems. You will implement RTL‑to‑GDSII flows, optimize timing, power and area, and drive signoff readiness for space environments.

Bachelor’s degree in EE/CE/CS and 1+ years in RTL2GDSII physical design are required, along with familiarity with industry EDA tools and CMOS physics. SpaceX offers impactful projects, a collaborative culture, and growth opportunities.

Qualifications

  • Bachelor’s degree in electrical engineering, computer engineering or computer science.
  • 1+ years of professional experience in RTL2GDSII physical design and/or physical design flow development.
  • Experience with industry standard EDA tools and flow development.
  • Understanding of CMOS deep sub‑micron physics and standard cells.

Responsibilities

  • Perform partition synthesis and physical implementation steps including synthesis, floorplanning, P/G grid, place and route, timing, noise.
  • Develop/improve physical design methodologies and automation scripts.
  • Collaborate with the ASIC design team to drive feasibility studies and design targets, and explore RTL/design tradeoffs.
  • Resolve design/timing/congestion issues and drive execution.
  • Run signoff verification in STA, noise, and physical verification and fix issues.

Skills

RTL2GDSII flow
EDA tools
FinFET CMOS physics
CMOS digital design
CMOS power dissipation
DFT/MBIST/LBIST
Python scripting
Self-driven

Education

Bachelor's degree in Electrical/Computer Engineering or Computer Science

Tools

EDA tool suites

Job description

SpaceX is seeking a Physical Design Engineer (Silicon Engineering) to develop next‑gen ASICs for Starlink satellites and ground systems. You will implement RTL‑to‑GDSII flows, optimize timing, power and area, and drive signoff readiness for space environments.

Bachelor’s degree in EE/CE/CS and 1+ years in RTL2GDSII physical design are required, along with familiarity with industry EDA tools and CMOS physics. SpaceX offers impactful projects, a collaborative culture, and growth opportunities.

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