Night-Shift Module Engineer: 24x7 Packaging Ops

Intel

Phoenix (AZ)

On-site

USD 65,000 - 90,000

Full time

2 days ago
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Job summary

Intel Corporation's Substrate Packaging Technology Development (SPTD) is seeking a Module Engineer On Shift (MEOS) to join our Chandler facility in Arizona. You will support 24x7 manufacturing, troubleshoot equipment and process issues, and ensure continuous lot movement on the production line.

This entry-level role offers hands-on floor exposure, cross‑functional collaboration with engineers and technicians, and opportunities to contribute to next‑gen semiconductor packaging while developing

Qualifications

  • Bachelor's degree in materials/ mechanical/ chemical engineering, physics, or related discipline with 1+ years of relevant industry experience, or a Master's degree.
  • This position is entry level and not eligible for Intel immigration sponsorship.
  • Preferred qualifications include 1+ years applying Statistical Process Control (SPC) methodologies in manufacturing.
  • Hands-on experience in semiconductor packaging or packaging substrate manufacturing.

Responsibilities

  • Provide hands-on, real-time floor support for equipment, process, and product issues to maintain 24x7 flow.
  • Receive and deliver shift pass-downs; align priorities with management at shift start.
  • Troubleshoot process issues, perform error recovery, manage lot disposition and tool enablement.

Skills

Problem-solving
Clear communication
Adaptability
Self-motivation
Team-oriented

Education

Bachelor's degree in materials/ mechanical/ chemical engineering
Master's degree in materials/ mechanical/ chemical engineering

Job description

Intel Corporation's Substrate Packaging Technology Development (SPTD) is seeking a Module Engineer On Shift (MEOS) to join our Chandler facility in Arizona. You will support 24x7 manufacturing, troubleshoot equipment and process issues, and ensure continuous lot movement on the production line.

This entry-level role offers hands-on floor exposure, cross‑functional collaboration with engineers and technicians, and opportunities to contribute to next‑gen semiconductor packaging while developing

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