Memory Packaging Architect-Pathfinding for AI-Scale Systems

Micron Technology

San Jose (CA)

On-site

USD 143,000 - 398,000

Full time

7 days ago
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Job summary

Micron Technology in San Jose is seeking a seasoned engineer for a technical pathfinding role in memory packaging. You will define next-generation package architectures, optimize across silicon, package, board, and system, and partner with customers to translate complex requirements into scalable solutions.

You’ll collaborate with silicon, materials, electrical, thermo-mechanical and system-performance teams to develop AI-based multi-physics approaches that improve speed, bandwidth, power and

Qualifications

  • Master’s degree or equivalent practical experience in EE, CE, CS, or related field.
  • 6+ years of extensive hands‑on experience in memory systems package design, signaling, IO design, PDN design.
  • Experience using Cadence, Siemens, and Ansys tools for packaging design and analysis.
  • Experience applying AI or LLMs for engineering efficiency.

Responsibilities

  • Define next‑generation package pathfinding and system architectures optimizing speed, bandwidth, and power.
  • Lead cross‑stack co‑optimization across silicon, package, board, and system with package-centric solutions.
  • Drive long‑term memory technology packaging strategy and influence industry standards.
  • Collaborate with silicon and system design teams and customers for next generation and long-term disruptive solutions to boost speed for edge-AI and datacenter memory products.
  • Serve as a technical interface to internal partners, customers, BUs, senior leaders.
  • Develop AI based multi-physics solutions for efficiency gains.

Skills

Memory timing
Packaging design
Power integrity
AI/LLMs for engineering

Education

Master’s degree
PhD (preferred)

Tools

Cadence
Siemens
Ansys

Job description

Micron Technology in San Jose is seeking a seasoned engineer for a technical pathfinding role in memory packaging. You will define next-generation package architectures, optimize across silicon, package, board, and system, and partner with customers to translate complex requirements into scalable solutions.

You’ll collaborate with silicon, materials, electrical, thermo-mechanical and system-performance teams to develop AI-based multi-physics approaches that improve speed, bandwidth, power and

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