Memory Controller Verification Engineer - UVM & AXI/DDR

Cadence Design Systems; Austin (TX); On-site; USD 110,000 - 150,000; Full time

Job summary

Cadence Design Systems in Austin seeks a Verification Engineer for the Memory Controller team. You will work with the existing functional verification environment to add new features, validate multiple customer configurations, and support regressions.

Candidates should have a BS/MS in Electrical or Computer Engineering and 2–3 years of design verification experience, with strong UVM background. AXI/CHI-E exposure is a plus.

Qualifications

• BS/MS in Electrical or Computer Engineering is required.
• 2–3 years of design verification experience.
• Strong background in functional verification fundamentals, environment planning, test plan generation.
• UVM-based functional verification environment development is required.
• AXI and CHI-E experience is highly desirable.
• Memory controller verification experience is desirable.

Responsibilities

• Lead verification effort for memory controller development.
• Collaborate with the existing verification environment to add features and ensure customer configurations pass regressions.
• Support customers with verification environment issues and measure code coverage to meet quality metrics.

Skills

UVM-based verification

Functional verification fundamentals

Environment planning

Test plan generation

Environment development

AXI/CHI-E experience

Memory controller verification

Education

BS/MS - Electrical / Computer Engineering

Job description

Cadence Design Systems in Austin seeks a Verification Engineer for the Memory Controller team. You will work with the existing functional verification environment to add new features, validate multiple customer configurations, and support regressions.

Candidates should have a BS/MS in Electrical or Computer Engineering and 2–3 years of design verification experience, with strong UVM background. AXI/CHI-E exposure is a plus.