Lead Post-Silicon Validation Engineer for AI ASICs

Celero Communications, Inc.; Irvine (CA); On-site; USD 150,000 - 250,000; Full time

Job summary

Celero Communications, Inc. is seeking a Principal Post-Silicon Validation Engineer to lead validation for next-generation coherent DSP ASICs, enabling first silicon and production readiness.

You will define validation strategies, work across Architecture, RTL, Firmware, and Systems, and build validation infrastructure from the ground up. In this role you will validate PCIe, Ethernet, SerDes, CXL, and other high-speed interfaces, develop automation for test execution, and guide debug across

Qualifications

• 8+ years of hands-on post-silicon validation or silicon bring-up experience with complex ASICs or SoCs.
• Experience bringing first silicon to production in networking, data center, or AI hardware products.
• Strong understanding of silicon debug methodologies and structured root-cause analysis.
• Experience with high-speed interfaces and lab equipment.

Responsibilities

• Lead post-silicon validation and characterization from first silicon through production release.
• Develop validation plans covering functionality, performance, interoperability, and reliability.
• Enable first silicon bring-up using JTAG, scan, and board-level diagnostics.
• Validate high-speed interfaces (PCIe, Ethernet, SerDes, CXL, USB, SPI, I2C).
• Develop Python-based automation frameworks for test execution and data analysis.
• Document validation results and production readiness reports.

Skills

Post-silicon validation

Python automation

Root-cause analysis

Hardware/firmware debugging

High-speed interfaces

Education

Bachelor’s or Master’s in Electrical/Computer Engineering

Tools

Oscilloscopes

BERTs

Protocol analyzers

Logic analyzers

JTAG/embedded debug

Job description

Celero Communications, Inc. is seeking a Principal Post-Silicon Validation Engineer to lead validation for next-generation coherent DSP ASICs, enabling first silicon and production readiness.

You will define validation strategies, work across Architecture, RTL, Firmware, and Systems, and build validation infrastructure from the ground up. In this role you will validate PCIe, Ethernet, SerDes, CXL, and other high-speed interfaces, develop automation for test execution, and guide debug across