Principal Debug Validation Engineer

EngineersOfAI; Austin (TX); On-site; USD 100,000 - 130,000; Full time

Job summary

EngineersOfAI is seeking a Principal Embedded SW/FW Engineer based in Austin, Texas. In this role, you will be part of a collaborative team validating high-performance AI chips. Responsibilities include developing validation tests, collaborating with engineers, and providing technical guidance.

The ideal candidate will have extensive knowledge in embedded C/C++, experience with silicon validation processes, and excellent communication skills to support innovative product introductions.

Qualifications

• Strong experience in Bare metal / embedded C/C++.
• Ability to analyze test results and debug failures/defects.
• 5 to 10 years of relevant experience preferred.

Responsibilities

• Plan, design, and debug silicon validation tests.
• Deploy validation tests on first silicon and debug them.
• Develop automated test framework and regression test suites.

Skills

Understanding of ML applications and their workloads

Bare metal / embedded C/C++

Excellent problem-solving skills

Python

Linux

Excellent communication skills

Tools

Debug tools

FPGA

Emulator

Job description

Principal Embedded SW/FW Engineer (Bringup) - Austin, Tx, USA

Job Summary

We have an exciting opportunity to be part of a collaborative, cross-functional development team validating cutting‑edge, high‑performance AI chips and platforms.

You will play a key role in supporting new product introductions and post‑silicon validation.

Working within the Post‑Silicon Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to provide technical guidance to other engineering team members. In this role, you can leverage our experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes.

The Team

The Post‑Silicon Bringup team sits within the Architecture and Validation team, we are responsible for bringup and validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and supporting the Silicon Characterisation team.

Responsibilities and Duties

• Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon
• Deploy silicon validation tests on first silicon and debugging them
• Develop automated test framework and regression test suites in Python to optimize validation efficiency
• Collaborate closely with engineers from many other disciplines on a variety of topics
• Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies
• Analyse test results, identify and debug failures/defects
• Contribute to shared test and validation infrastructure
• Provide feedback to architects

Candidate Profile

Essential

• Understanding of ML applications and their workloads
• A self‑starter who can apply independent judgement
• A team player able to lead and support colleagues with difficult concepts
• Strong experience in Bare metal / embedded C/C++
• Excellent problem‑solving, analytical & diagnostic skills
• Ability to work across teams and programming languages to find root causes of critical and complex issues
• Experience of the post‑silicon validation process applied in digital ASIC environments
• Python, Linux
• Excellent communication skills and the ability to explain difficult concepts to resolve issues

Desirable

• 5 to 10 years’ experience
• Experience building and leading, multi‑site teams
• Driver level experience with one or more of the following is highly desirable:
  • PCIe
  • Ethernet
  • Memory technologies (LPDDR, DDR, HBM, …)
  • Other peripherals such as I2C, I3C, SPI, …
• Good knowledge of mixed‑signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable.
• Experience of Arm CPUs, System IPand debug tools.
• Experience of AMBA protocols.
• Experience in Characterization, Failure Analysis, Test Development, Statistical analysis,