Principal Silicon Validation Engineer - Post-Silicon Lead

Astera Labs; San Jose (CA); On-site; USD 205,000 - 260,000; Full time

Job summary

Astera Labs in San Jose, CA is seeking a Principal/Senior Principal Post-Silicon Validation Engineer to lead post-silicon validation plans for high-speed connectivity products used in AI and data centers.

You will automate IC- and board-level testing, design experiments to root-cause issues, analyze results against specs, and collaborate with hardware, firmware, and software teams to quantify performance margins and ensure production-ready designs.

Qualifications

• Bachelor’s degree in Electrical or Computer Engineering; Master’s preferred.
• ≥10 years experience supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking.
• Ability to plan and prepare for internal meetings with minimal supervision.
• Entrepreneurial, customer-focused attitude and can-do mindset.
• Proven track record as a tech lead.
• Experience with debugging and bring-up of complex SoCs with PCIe and Ethernet.
• Strong problem-solving and independent work skills.
• Knowledge of PLLs, CTLE, DFE, Tx EQ, PAM4 signaling.
• Strong Python scripting and OO programming; basic Git usage.
• Experience with high-speed lab equipment: BERT, Oscilloscope, VNA.

Responsibilities

• Define comprehensive post-silicon validation plans for high-speed connectivity products.
• Automate IC- and board-level testing and design experiments to identify root causes.
• Analyze and report validation results against specifications and collaborate with internal stakeholders.
• Quantify performance margins and ensure production-ready designs.

Skills

Post-silicon validation leadership

SoC/ silicon experience

Plan and prioritize work

Problem-solving independently

PCIe / 802.3 Ethernet debugging

Python scripting

C/C++ embedded firmware

Root-cause analysis

Customer-focused mindset

Team collaboration

Education

Bachelor’s in Electrical/Computer Engineering

Master’s degree preferred

Tools

BERT

Oscilloscope

VNA

Cadence

Altium

MATLAB

Keysight ADS

PLTS

Job description

Astera Labs in San Jose, CA is seeking a Principal/Senior Principal Post-Silicon Validation Engineer to lead post-silicon validation plans for high-speed connectivity products used in AI and data centers.

You will automate IC- and board-level testing, design experiments to root-cause issues, analyze results against specs, and collaborate with hardware, firmware, and software teams to quantify performance margins and ensure production-ready designs.