Lead High-Speed ASIC Packaging & SI/PI Design (Remote)

Ladders; United States; Remote; USD 187,000 - 268,000; Full time

Benefits offered by this job

Hybrid work option

Onsite preference in San Jose, CA

Mentorship opportunities

Cutting-edge ASIC packaging

Job summary

Ladders' client is seeking a Hardware ASIC Packaging SI/PI Simulation and Design Lead to guide high-speed packaging efforts for advanced semiconductor hardware in a remote setting. You will partner across layout, architecture, system, and vendors to resolve complex challenges from conception to high-volume release.

You will lead design decisions, establish SI/PI design rules, perform simulations, and mentor engineers to strengthen engineering execution across the organization.

Qualifications

• Bachelor's degree in Electrical Engineering with 8+ years of experience, or advanced degrees with reduced years.
• Expertise in high-speed signaling and SERDES architectures (56G PAM4).
• Proficiency with SI/PI simulations and physical validation tools.

Responsibilities

• Develop and implement design rules for ultra-high-speed signaling to support power and performance goals.
• Analyze substrate signal and power integrity with layout teams to identify optimal solutions.
• Design and document ASIC packages for high-volume release, including post-layout extraction.
• Collaborate with system partners and vendors to resolve SI/PI issues.
• Define processes and tools for complex ASIC and package development.
• Lead architecture discussions and IC design reviews for high-performance ASICs.
• Mentor junior engineers and drive continuous improvement across teams.

Skills

High-speed design

Signal integrity

Power integrity

SI/PI methods

Transmission Line Theory

Impedance analysis

IC design reviews

Mentorship

Education

Bachelor's in Electrical Engineering

Master's in Electrical Engineering

PhD in Electrical Engineering

Tools

Cadence Sigrity

Ansys HFSS

Cadence APD

Ansys EM flows

SPICE

Job description

Ladders' client is seeking a Hardware ASIC Packaging SI/PI Simulation and Design Lead to guide high-speed packaging efforts for advanced semiconductor hardware in a remote setting. You will partner across layout, architecture, system, and vendors to resolve complex challenges from conception to high-volume release.

You will lead design decisions, establish SI/PI design rules, perform simulations, and mentor engineers to strengthen engineering execution across the organization.