Lead High-Speed Analog Design Engineer for AI Transceivers

Celero Communications, Inc.; United States; Teletrabalho; USD 140 000 - 210 000; Tempo integral

Resumo da oferta

Celero Communications, Inc. seeks a Principal Analog Design Engineer to drive high-speed transceiver development and related analog blocks for next‑gen interconnect tech.

The role emphasizes hands-on circuit design, simulation, and close collaboration with RF/logic teams. You will craft architectures, lead layout across CMOS nodes, and mentor a growing team for production-ready designs.

Qualificações

• Master's degree and/or PhD in Electrical Engineering or related field.
• 5+ years of experience in analog/mixed-signal design.
• Experience with layout-aware analog design and verification.

Responsabilidades

• Design high-speed analog circuits for transceivers (VGA, CTLE, DRV).
• Develop clock generation and distribution (VCOs, PLL, clock distribution).
• Design fundamental analog blocks (bandgap references, LDOs, temp sensors).
• Supervise analog layouts within advanced process nodes.
• System verification and circuit design specifications.

Conhecimentos

Analog design

VLSI CMOS

Analog verification

High-speed design

EMAnalog knowledge

Formação académica

Master's/PhD in Electrical Eng

Ferramentas

Virtuoso

Spectre

ADE

Post-layout extraction

EMX

Momentum

HFSS

Descrição da oferta de emprego

Celero Communications, Inc. seeks a Principal Analog Design Engineer to drive high-speed transceiver development and related analog blocks for next‑gen interconnect tech.

The role emphasizes hands-on circuit design, simulation, and close collaboration with RF/logic teams. You will craft architectures, lead layout across CMOS nodes, and mentor a growing team for production-ready designs.