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Celero Communications, Inc. is seeking an experienced Principal Analog Design Engineer in San Jose, CA.
You will architect and develop high-speed analog circuits for transceivers and related functions, lead layout supervision, and drive verification across CMOS processes. The role requires a Master’s or PhD in Electrical Engineering with 5+ years in analog design, strong fundamentals, and proficiency in Virtuoso/Spectre/ADE, as well as EM and high-frequency design knowledge.
Are you an Analog Design Engineer, who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology powering next generation AI? We are looking for an Analog Design Engineer – someone who is excited to join a fast-growing Start-Up Company growing a group of diverse individuals responsible for handling high-speed mixed-signal circuit designs! Candidate will have the opportunity to architect and design circuits for high-performance transceivers and other critical analog functions.