Principal Analog Design Engineer

Celero Communications; United States; Remote; USD 140,000 - 210,000; Full time

Job summary

Celero Communications, Inc. seeks a Principal Analog Design Engineer to drive high-speed transceiver development and related analog blocks for next‑gen interconnect tech.

The role emphasizes hands-on circuit design, simulation, and close collaboration with RF/logic teams. You will craft architectures, lead layout across CMOS nodes, and mentor a growing team for production-ready designs.

Qualifications

• Master's degree and/or PhD in Electrical Engineering or related field.
• 5+ years of experience in analog/mixed-signal design.
• Experience with layout-aware analog design and verification.

Responsibilities

• Design high-speed analog circuits for transceivers (VGA, CTLE, DRV).
• Develop clock generation and distribution (VCOs, PLL, clock distribution).
• Design fundamental analog blocks (bandgap references, LDOs, temp sensors).
• Supervise analog layouts within advanced process nodes.
• System verification and circuit design specifications.

Skills

Analog design

VLSI CMOS

Analog verification

High-speed design

EMAnalog knowledge

Education

Master's/PhD in Electrical Eng

Tools

Virtuoso

Spectre

ADE

Post-layout extraction

EMX

Momentum

HFSS

Job description

Principal Analog Design Engineer

About the job

Are you an Analog Design Engineer, who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology powering next generation AI? We are looking for an Analog Design Engineer - someone who is excited to join a fast-growing Start-Up Company growing a group of diverse individuals responsible for handling high-speed mixed-signal circuit designs! Candidate will have the opportunity to architect and design circuits for high-performance transceivers and other critical analog functions.

What You Will Do

• High speed analog circuit design, such as high-speed broadband amplifiers (VGA, CTLE, DRV, etc.)
• Clock generation and distribution (VCOs, PLL, clock distribution, etc.)
• Fundamental analog blocks (bandgap references, LDOs, temp sensors, etc.)
• New techniques for the development of next generation optical transceiver
• Design of custom passive components, from concept to silicon implementation
• Supervise analog layouts within advanced process nodes
• System verification and circuit design spec creation
• Silicon bring-up, debug and support
• Team communication and documentation

What You Will Bring

• Master's degree and/or PhD in Electrical Engineering or related fields with 5+ years of experience
• Should have strong analog design fundamentals and experience in designing analog circuit blocks for broadband amplification, clock generation and distribution, and/or fundamental analog blocks
• Experience with analog design and verification tools (Virtuoso, Spectre, ADE, and post layout extraction tools) is a must
• Experience in advance CMOS design and verification flows (tools to evaluate self-heating, electromigration, safe operating area)
• Experience with electromagnetic simulation tools (EMX, Momentum, HFSS or other) is a plus
• Knowledge of the fundamentals on electromagnetism, lump models, and high frequency design
• Good understanding of analog layouts in FinFET and its effect on high-speed designs is a plus
• Strong communication and documentation skills

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