Lead Debug, Trace & Profiling Architect

SiFive; Boston (MA); On-site; USD 120,000 - 150,000; Full time

Job summary

SiFive is looking for a hardware design technical lead based in Boston, Massachusetts. The ideal candidate will be responsible for designing industry-leading debug, trace, and profiling IP while enabling hardware design with agility. The successful applicant will collaborate with various teams and implement RTL generators that enhance configurability.

Candidates should have proven knowledge in CPU architectures and SoC design. This role is essential for driving RISC-V adoption across different applications.

Qualifications

• Extensive knowledge in designing debug, trace, and profiling hardware.
• Experience working with various performance and hardware teams.
• Capability in implementing RTL generators for hardware design.

Responsibilities

• Architect, design, and implement debug, trace, and profiling hardware.
• Collaborate with architecture and software teams for design specifications.
• Integrate new design content into SiFive’s Chisel/FIRRTL framework.

Skills

Debug architecture knowledge

JTAG and cJTAG knowledge

CPU architectures and SoC design knowledge

Job description

SiFive is looking for a hardware design technical lead based in Boston, Massachusetts. The ideal candidate will be responsible for designing industry-leading debug, trace, and profiling IP while enabling hardware design with agility. The successful applicant will collaborate with various teams and implement RTL generators that enhance configurability.

Candidates should have proven knowledge in CPU architectures and SoC design. This role is essential for driving RISC-V adoption across different applications.