Lead ASIC Verification for High-Speed DSP & AI Accelerators

Google LLC; Sunnyvale (CA); On-site; USD 240,000 - 333,000; Full time

Job summary

Google LLC is seeking an ASIC Design Verification Technical Lead for high-speed DSP to shape AI/ML hardware acceleration. You will drive verification architectures and lead constrained-random verification environments for TPU blocks, with emphasis on pre/post-silicon correlation and emulation strategies.

You will collaborate with DSP designers to align RTL with specifications, contribute to co-simulation frameworks, and push coverage decisions across architectural corner cases in large-scale AI

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.

Responsibilities

• Design, build, and scale constrained-random verification environments using SystemVerilog and UVM for high-speed physical-layer DSP blocks.
• Build co-simulation frameworks and predictors to compare RTL implementation output against high-level algorithmic models.
• Define and execute functional coverage plans, utilizing covergroups and SystemVerilog Assertions to verify architectural corner cases, fixed-point quantization effects, and numerical overflows.
• Author dynamic stimulus sequences and virtual sequencers to stress-test adaptive feedback loops under realistic channel impairments, including noise, ISI, and high-frequency jitter profiles.
• Lead the debugging of RTL and environment failures, collaborating closely with algorithm and DSP designers to isolate and resolve discrepancies between the RTL implementation and the specification.

Skills

SystemVerilog

UVM

constrained-random verification

RTL debugging

post-silicon correlation

emulation

co-simulation

covergroups

SystemVerilog Assertions

digital design verification

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field

Master's degree in Electrical Engineering, Computer Engineering, or a related technical field

PhD in Electrical Engineering, Computer Engineering, or a related technical field

Job description

Google LLC is seeking an ASIC Design Verification Technical Lead for high-speed DSP to shape AI/ML hardware acceleration. You will drive verification architectures and lead constrained-random verification environments for TPU blocks, with emphasis on pre/post-silicon correlation and emulation strategies.

You will collaborate with DSP designers to align RTL with specifications, contribute to co-simulation frameworks, and push coverage decisions across architectural corner cases in large-scale AI