Senior ASIC Verification Engineer for AI/ML Hardware (TPU)

Google

Sunnyvale (CA)

On-site

USD 163,000 - 236,000

Full time

20 hours ago
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Job summary

Google in Sunnyvale is seeking an ASIC Design Verification Engineer to shape the future of AI/ML hardware acceleration. You will verify complex digital designs, focusing on TPU architecture and its integration in AI-driven systems, and contribute to data center accelerators.

You will work on project definition, design verification, and silicon bring-up as part of a team responsible for next-generation data center accelerators and cutting-edge TPU technologies.

Qualifications

  • BS in EE/CE/CS or equivalent practical experience.
  • 8 years of design verification experience.
  • Proficiency in SystemVerilog/UVM for ASIC verification.

Responsibilities

  • Plan verification of complex digital design blocks by understanding specs and coordinating with design engineers to identify important verification scenarios.
  • Create and enhance constrained-random verification environments using SystemVerilog and UVM.
  • Identify and write all types of coverage measures for stimulus and corner-cases.
  • Debug tests with design engineers to deliver functionally correct design blocks.
  • Close coverage measures to identify verification holes and show progress toward tape-out.

Skills

8+ years of design verification
RTL/ASIC verification
Full verification life cycle
SoC projects
Interconnect IP verification

Education

Bachelor's degree in Electrical/Computer Engineering or Computer Science
Master's or PhD in EE/CE/CS with architecture focus

Job description

Google in Sunnyvale is seeking an ASIC Design Verification Engineer to shape the future of AI/ML hardware acceleration. You will verify complex digital designs, focusing on TPU architecture and its integration in AI-driven systems, and contribute to data center accelerators.

You will work on project definition, design verification, and silicon bring-up as part of a team responsible for next-generation data center accelerators and cutting-edge TPU technologies.

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