Lead ASIC Digital Design for 100G/400G Optical Interconnects

Cisco Systems, Inc.; Carlsbad (CA); On-site; USD 166,000 - 238,000; Full time

Job summary

Cisco Systems, Inc. is seeking a Digital Design Technical Leader for Silicon One Optics to own the full ASIC lifecycle—from concept to tapeout and post-silicon validation.

You will drive digital architectures, oversee high-speed IP integration, and optimize power and performance for next‑generation 100G/200G/400G interconnects. You will lead cross-functional teams across digital, analog, firmware, and physical design, ensuring robust design flows, verification coverage, and timely delivery of

Qualifications

• Experience with FSMs, CPU subsystems, complex SoCs, and FPGA validation.
• Experience managing the complete ASIC/SoC design flow.
• Familiarity with high-speed SerDes, Ethernet, and D2D PHY IP.
• Strong RTL design, verification, and IP integration skills.

Responsibilities

• Lead end-to-end silicon and subsystem design from RTL to GDSII signoff.
• Define architectures and translate requirements into datapath specs.
• Verify and integrate SerDes and DSP IP.
• Support backend, timing closure, DFT, and QoR metrics automation.
• Collaborate across cross-functional teams to resolve design trade-offs.

Skills

FSMs

CPU subsystems

SoCs

FPGA validation

ASIC/SoC design flow

SerDes IP

Ethernet IP

D2D PHY IP

Education

Bachelors + 8 years / Masters + 6 years / PhD + 3 years

Tools

RTL (Verilog/VHDL)

GDSII

FPGA prototyping

ATE

Synthesis

DFT

Job description

Cisco Systems, Inc. is seeking a Digital Design Technical Leader for Silicon One Optics to own the full ASIC lifecycle—from concept to tapeout and post-silicon validation.

You will drive digital architectures, oversee high-speed IP integration, and optimize power and performance for next‑generation 100G/200G/400G interconnects. You will lead cross-functional teams across digital, analog, firmware, and physical design, ensuring robust design flows, verification coverage, and timely delivery of